
R8C/10 Group
Rev.1.20 Jan 27, 2006 page 59 of 180
REJ09B0019-0120
12.1.2 Pulse Output Mode
In this mode, the timer counts an internally generated count source, and outputs from the CNTR0 pin
a pulse whose polarity is inverted each time the timer underflows (See “Table 12.3 Pulse Output mode
Specifications”). Figure 12.5 shows TXMR register in pulse output mode.
Item Specification
Count source f1, f2, f8, f32
Count operation • Down-count
•
When the timer underflows, the contents in the reload register is reloaded and the count
is continued
Divide ratio 1/(n+1)(m+1) n: set value of PREX register, m: set value of TX register
Count start condition Write “1” (count start) to TXS bit in TXMR register
Count stop condition Write “0” (count stop) to TXS bit in TXMR register
Interrupt request • When Timer X underflows [Timer X interruption]
generation timing
INT1/CNTR0 pin function Pulse output
CNTR0 pin function Programmable I/O port or inverted output of CNTR0
Read from timer Count value can be read by reading TX register.
Same applies to
PREX
register.
Write to timer
Value written to TX register is written to both reload register and counter.
Same applies to
PREX
register.
Select function
_____
• INT1/CNTR0 polarity switching function
Polarity level at starting of pulse output can be selected with R0EDG bit
(1)
• Inverted pulse output function
___________
The inverted pulse of CNTR0 output polarity can be output from the CNTR0 pin
(selected by the TXOCNT bit)
NOTES:
1. The level of the output pulse becomes the level when the pulse output starts when the TX register is written to.
Table 12.3 Pulse Output Mode Specifications
Figure 12.5 TXMR Register in Pulse Output Mode
12.1 Timer (Timer X)
Timer X mode register
S
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m
b
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1 : Starts counting
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