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R8C/10 Group 19. Usage Notes

Rev.1.20 Jan 27, 2006 page 165 of 180

REJ09B0019-0120

Example 1: Use NOP instructions to prevent I flag being set to “1”

before interrupt control register is changed

INT_SWITCH1:

FCLR I ; Disable interrupts

AND.B #00H, 0056H ; Set TXIC register to “00

”

NOP

FSET I ; Enable interrupts

Example 2: Use dummy read to have FSET instruction wait

INT_SWITCH2:

FCLR I ; Disable interrupts

AND.B #00H, 0056H ; Set TXIC register to “00

”

MOV.W MEM, R0 ;

Dummy read

FSET I ; Enable interrupts

Example 3: Use POPC instruction to change I flag

INT_SWITCH3:

PUSHC FLG

FCLR I ; Disable interrupts

AND.B #00H, 0056H ; Set TXIC register to “00

”

POPC FLG ; Enable interrupts

19.2.6 Changing Interrupt Control Register

(1) Each interrupt control register can only be changed while interrupt requests corresponding to that

changing the interrupt control register.

(2) When changing any interrupt control register after disabling interrupts, be careful with the instruc-

tion to be used.

When Changing Any Bit Other Than IR Bit

If an interrupt request corresponding to that register is generated while executing the instruction, the

IR bit may not be set to “1” (interrupt requested), and the interrupt request may be ignored. If this

causes a problem, use the following instructions to change the register.

Instructions to use: AND, OR, BCLR, BSET

When Changing IR Bit

If the IR bit is set to “0” (interrupt not requested), it may not be set to “0” depending on the instruction

used. Use the MOV instruction to set the IR bit to “0”.

(3) When disabling interrupts using the I flag, set the I flag according to the following sample pro-

grams. Refer to (2) for the change of interrupt control registers in the sample programs.

Sample programs 1 to 3 are preventing the I flag from being set to “1” (interrupt enabled) before writing

to the interrupt control registers for reasons of the internal bus or the instruction queue buffer.

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Renesas R8C/Tiny Series Manuale Pagina 175

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