
M37221M4H/M6H/M8H/MAH–XXXSP/FP M37221EASP/FP
Rev.1.00 Oct 01, 2002 page 72 of 110
REJ03B0134-0100Z
8.11.8 OSD Output Pin Control
The OSD output pins R, G, B and OUT1 can also function as ports
P52–P55. Set the corresponding bit of the port P5 direction register
(address 00CB16) to “0” to specify these pins as OSD output pins, or
to “1” to specify as the general-purpose port P5.
The OUT2 can also function as port P10. Set bit 0 of the OSD port
control register (address 00EC16) to “1” (output mode). After that, set
bit 7 of the OSD control register to “1” to specify the pin as OSD
output pin, or set it to “0” to specify as port P10.
The input polarity of the HSYNC and VSYNC, and the output polarity of
signals R, G, B, OUT1 and OUT2 can be specified with the OSD port
control register (address 00EC). Set bits to “0” to specify positive
polarity; set it to “1” to specify negative polarity (refer to Figure 8.11.13).
The OSD port control register is shown in Figure 8.11.17.
Fig. 8.11.17 OSD Port Control Register
7
6
5
4
3
2
1
0
p
o
r
t
c
o
n
t
r
o
r
e
g
s
t
e
r
r
e
s
s
0
0
1
6
a
m
e
u
n
c
t
o
n
s
ter reset
ort
ontro
eg
ster
0
SYNC
nput po
ar
ty
switch bit (HSYC)
0
:
o
s
t
v
e
p
o
a
r
t
y
n
p
u
t
1
:
N
e
g
a
t
i
v
e
p
o
l
a
r
i
t
y
i
n
p
u
t
0
10
:
o
s
t
v
e
p
o
a
r
t
y
n
p
u
t
1
:
N
e
g
a
t
i
v
e
p
o
l
a
r
i
t
y
i
n
p
u
t
0
2
/
/
output po
ar
ty sw
tc
bit (R/G/B)
0
:
o
s
t
v
e
p
o
a
r
t
y
o
u
t
p
u
t
1
:
N
e
g
a
t
i
v
e
p
o
l
a
r
i
t
y
o
u
t
p
u
t
0
30
4
1 output po
ar
ty
switch bit (OUT1)
0
:
o
s
t
v
e
p
o
a
r
t
y
o
u
t
p
u
t
1
:
N
e
g
a
t
i
v
e
p
o
l
a
r
i
t
y
o
u
t
p
u
t
0
5
s
gna
output sw
tc
t
(OP5)
0
:
s
g
n
a
o
u
t
p
u
t
1
:
M
U
T
E
s
i
g
n
a
l
o
u
t
p
u
t
0
6
s
gna
output sw
tc
bit(OP6)
0 :
s
gna
output
1 : MUTE signal output
0
7
s
gna
output sw
tc
bit(OP7)
0
:
s
g
n
a
o
u
t
p
u
t
1
:
M
U
T
E
s
i
g
n
a
l
o
u
t
p
u
t
0
SYNC
nput po
ar
ty
switch bit (VSYC)
2 output po
ar
ty
switch bit (OUT2)
0
:
o
s
t
v
e
p
o
a
r
t
y
o
u
t
p
u
t
1
:
N
e
g
a
t
i
v
e
p
o
l
a
r
i
t
y
o
u
t
p
u
t
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