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Renesas PROM Programming Adapter PCA7408 Manuale Utente Pagina 38

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M37221M4H/M6H/M8H/MAH–XXXSP/FP M37221EASP/FP
Rev.1.00 Oct 01, 2002 page 38 of 110
REJ03B0134-0100Z
(8) Bit 7: Communication mode specification bit
(master/slave specification bit: MST)
This bit is used for master/slave specification in data communica-
tions. When this bit is “0,” the slave is specified, so that a START
condition and a STOP condition generated by the master are received,
and data communication is performed in synchronization with the
clock generated by the master. When this bit is “1,” the master is
specified and a START condition and a STOP condition are gener-
ated, and also the clocks required for data communication are gen-
erated on the SCL.
The MST bit is cleared to “0” in any of the following conditions.
• Immediately after completion of 1-byte data transmission when
arbitration lost is detected
• When a STOP condition is detected.
• When occurence of a START condition is disabled by the START
condition duplication prevention function (Note).
• At reset
Fig. 8.6.7 I
2
C Status Register
b
7
b
6
b
5
b
4
b
3
b
2
b
1
b
0
I
2
C
s
t
a
t
u
s
r
e
g
i
s
t
e
r
(
S
1
)
[
A
d
d
r
e
s
s
0
0
D
91
6]
I
2
C
S
t
a
t
u
s
R
e
g
i
s
t
e
r
0
3
4
5
6
,
7
b
7
b
6
0 0 : Slave recieve mode
0 1 : Slave transmit mode
1 0 : Master recieve mode
1 1 : Master transmit mode
1
2
0
0
0
1
0
B
N
a
m
e
F
u
n
c
t
i
o
n
s
After reset
R
W
C
o
m
m
u
n
i
c
a
t
i
o
n
m
o
d
e
s
p
e
c
i
f
i
c
a
t
i
o
n
b
i
t
s
(
T
R
X
,
M
S
T
)
0 :
B
us
f
ree
1 : Bus busy
B
u
s
b
u
s
y
f
l
a
g
(
B
B
)
0 :
I
nterrupt request
i
ssue
d
1 : No interrupt request issued
I
2
C
-
B
U
S
i
n
t
e
r
f
a
c
e
i
n
t
e
r
r
u
p
t
r
e
q
u
e
s
t
b
i
t
(
P
I
N
)
0 :
N
ot
d
etecte
d
1 : Detected
A
r
b
i
t
r
a
t
i
o
n
l
o
s
t
d
e
t
e
c
t
i
n
g
f
l
a
g
(
A
L
)
(
S
e
e
n
o
t
e
)
0 :
Add
ress m
i
smatc
h
1 : Address match
S
l
a
v
e
a
d
d
r
e
s
s
c
o
m
p
a
r
i
s
o
n
f
l
a
g
(
A
A
S
)
(
S
e
e
n
o
t
e
)
0 :
N
o genera
l
ca
ll
d
etecte
d
1 : General call detected
G
e
n
e
r
a
l
c
a
l
l
d
e
t
e
c
t
i
n
g
f
l
a
g
(
A
D
0
)
(
S
e
e
n
o
t
e
)
0 :
L
ast
bi
t = “0 ”
1 : Last bit = “1 ”
L
a
s
t
r
e
c
e
i
v
e
b
i
t
(
L
R
B
)
(
S
e
e
n
o
t
e
)
N
o
t
e
:
T
h
e
s
e
b
i
t
s
a
n
d
f
l
a
g
s
c
a
n
b
e
r
e
a
d
o
u
t
,
b
u
t
c
a
n
n
n
o
t
b
e
w
r
i
t
t
e
n
.
I
n
d
eterm
i
nate
R—
R—
R—
R—
RW
R
W
0
R
W
(
S
e
e
n
o
t
e
)
(
S
e
e
n
o
t
e
)
(S
ee note
)
(S
ee note
)
Fig. 8.6.8 Interrupt Request Signal Generation Timing
SC
L
PIN
I
I
C
I
R
Q
Note:The START condition duplication prevention function disables the START
condition generation, bit counter reset, and SCL output, when the follow-
ing condition is satisfied:
a START condition is set by another master device.
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