41
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
38C8 Group
NOTES ON USE
Countermeasures Against Noise
(1) Shortest wiring length
➀ Wiring for RESET pin
Make the length of wiring which is connected to the RESET pin as
short as possible. Especially, connect a capacitor across the RESET
pin and the VSS pin with the shortest possible wiring (within 20mm).
● Reason
The width of a pulse input into the RESET pin is determined by the
timing necessary conditions. If noise having a shorter pulse width
than the standard is input to the RESET pin, the reset is released
before the internal state of the microcomputer is completely initial-
ized. This may cause a program runaway.
Fig. 41 Wiring for clock I/O pins
(2) Connection of bypass capacitor across VSS line and VCC line
In order to stabilize the system operation and avoid the latch-up,
connect an approximately 0.1
µ
F bypass capacitor across the VSS
line and the VCC line as follows:
• Connect a bypass capacitor across the VSS pin and the VCC pin at
equal length.
• Connect a bypass capacitor across the VSS pin and the VCC pin
with the shortest possible wiring.
• Use lines with a larger diameter than other signal lines for VSS line
and VCC line.
• Connect the power source wiring via a bypass capacitor to the VSS
pin and the VCC pin.
Fig. 40 Wiring for the RESET pin
➁ Wiring for clock input/output pins
• Make the length of wiring which is connected to clock I/O pins as
short as possible.
• Make the length of wiring (within 20 mm) across the grounding
lead of a capacitor which is connected to an oscillator and the
VSS pin of a microcomputer as short as possible.
• Separate the VSS pattern only for oscillation from other VSS pat-
terns.
● Reason
If noise enters clock I/O pins, clock waveforms may be deformed.
This may cause a program failure or program runaway. Also, if a
potential difference is caused by the noise between the VSS level
of a microcomputer and the VSS level of an oscillator, the correct
clock will not be input in the microcomputer.
RESET
Reset
circuit
Noise
V
SSVSS
Reset
circuit
V
SS
RESET
V
SS
N.G.
O.K.
Noise
X
IN
X
OUT
V
SS
X
IN
X
OUT
V
SS
N.G.
O.K.
V
SS
V
CC
V
SS
V
CC
N.G. O.K.
Fig. 42 Bypass capacitor across the VSS line and the VCC line
(55 pagine)
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