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11.3 Regarding Delay Dispatching
MR100 has four service calls related to delay dispatching.
• dis_dsp
• ena_dsp
• loc_cpu
• unl_cpu
The following describes task handling when dispatch is temporarily delayed by using these service calls.
14. When the execution task in delay dispatching should be preempted
While dispatch is disabled, even under conditions where the task under execution should be preempted, no time
is dispatched to new tasks that are in an executable state. Dispatching to the tasks to be executed is delayed until
the dispatch disabled state is cleared. When dispatch is being delayed.
• Task under execution is in a RUN state and is linked to the ready queue
• Task to be executed after the dispatch disabled state is cleared is in a READY state and is linked to the
highest priority ready queue (among the queued tasks).
15. isus_tsk,irsm_tsk during dispatch delay
In cases when isus_tsk is issued from an interrupt handler that has been invoked in a dispatch disabled state to
the task under execution (a task to which dis_dsp was issued) to place it in a SUSPEND state. During delay dis-
patching.
• The task under execution is handled inside the OS as having had its delay dispatching cleared. For this
reason, in isus_tsk that has been issued to the task under execution, the task is removed from the
ready queue and placed in a SUSPEND state. Error code E_OK is returned. Then, when irsm_tsk is
issued to the task under execution, the task is linked to the ready queue and error code E_OK is re-
turned. However, tasks are not switched over until delay dispatching is cleared.
• The task to be executed after disabled dispatching is re-enabled is linked to the ready queue.
16. rot_rdq, irot_rdq during dispatch delay
When rot_rdq (TPRI_RUN = 0) is issued during dispatch delay, the ready queue of the own task's priority is ro-
tated. Also, when irot_rdq (TPRI_RUN = 0) is issued, the ready queue of the executed task's priority is rotated.
In this case, the task under execution may not always be linked to the ready queue. (Such as when isus_tsk is is-
sued to the executed task during dispatch delay.)
17. Precautions
• No service call (e.g., slp_tsk, wai_sem) can be issued that may place the own task in a wait state while
in a state where dispatch is disabled by dis_dsp or loc_cpu.
• ena_dsp and dis_dsp cannot be issued while in a state where interrupts and dispatch are disabled by
loc_cpu.
• Disabled dispatch is re-enabled by issuing ena_dsp once after issuing dis_dsp several times.
The above status transition can be summarized in Table 3.3.
- M3T-MR100/4 V.1.00 1
- • Release Note 3
- • Users Manual (PDF file) 3
- Contents 5
- List of Figures 10
- List of Tables 13
- 2. General Information 17
- 2.3 MR100 Features 20
- 3. Introduction to Kernel 21
- Key input 23
- Monitor 24
- Register 26
- Memory map 26
- Register stored 27
- Register not stored 27
- 3.2 Service Call 28
- 3.3 Object 34
- 3.4 Task 35
- DORMANT 36
- SUSPENDED 36
- Priority 39
- Called the task context 41
- 3.5 System States 42
- 1. Interrupt Handler 42
- 2. Cyclic Handler 42
- 3. Alarm Handler 42
- 0 1 2 3 4 5 6 7 45
- 3.7 Stacks 48
- • User Stack 48
- • System Stack 48
- 4. Kernel 49
- 4.1.2 Module Overview 50
- Startup request count > 0 51
- 0 0 1 2 1 53
- Number of 54
- • Delay task (dly_tsk) 56
- Returned after use 57
- WAIT state 58
- Data Data 61
- Message Message 62
- Message 63
- • Processing speed 66
- • Memory usage efficiency 66
- • Ease of configuration 66
- • Set System Time (set_tim) 69
- Move the end of the queue 72
- Save Registers 73
- Task Selection 73
- 5. Service call reffernce 77
- No. Item Content 98
- - 102 116
- - 105 119
- - 107 121
- - 110 124
- - 112 126
- - 115 129
- - 117 131
- - 121 135
- - 124 138
- - 126 140
- - 132 146
- - 134 148
- - 138 152
- - 140 154
- (handler only) 155
- - 142 156
- - 147 161
- - 149 163
- - 152 166
- - 154 168
- - 158 172
- - 161 175
- - 164 178
- - 167 181
- - 173 187
- - 176 190
- - 190 204
- - 193 207
- - 198 212
- - 200 214
- - 202 216
- Overview 219
- - 206 220
- Figure 6.2 Program Example 222
- 6.2.4 System generation 223
- 6.2.5 Writing ROM 224
- 7. Detailed Applications 225
- - 214 228
- 7.2.1 Writing Task 229
- - 217 231
- For examples: 231
- - 219 233
- - 220 234
- - 221 235
- - 222 236
- 7.4 Memory Allocation 238
- • asm_sec.inc 238
- • c_sec.inc 238
- 8. Using Configurator 241
- Symbol 242
- MPU clock 245
- ID No 251
- ID name 251
- Number of data queues 252
- Select message queue 254
- Maximum message priority 254
- ID Name 256
- Section name 256
- Message buffer size 256
- Maximum message size 256
- Start address 259
- Extended information 259
- Vector No 260
- 8.2.1 Configurator Overview 268
- Configuration file name 270
- Error messages 271
- Warning messages 273
- 9.2 Program Source Listing 275
- 9.3 Configuration File 276
- XXX_XXX() 278
- System Stack 279
- Stack Section 279
- Sections used in MR100 280
- User stack size = 280
- Stack growing direction 281
- Σβi( γ) 282
- The necessary system stack 283
- Interrupt 283
- = register to be used 285
- 10.2 Necessary Stack Size 286
- 11. Note 289
- 17. Precautions 290
- 12. Appendix 293
- - 283 297
- - 284 298
- - 285 299
- - 288 302
- M3T-MR100/4 304
- User's Manual 304
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