
37
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
M37272M6/M8–XXXSP/FP, M37272MA–XXXSP
M37272E8SP/FP, M37272EFSP
MITSUBISHI MICROCOMPUTERS
Rev. 1.3
8.6.6 START Condition Generation Method
When the ESO bit of the I
2
C control register (address 00F916) is “1,”
execute a write instruction to the I
2
C status register (address 00F816)
to set the MST, TRX and BB bits to “1.” A START condition will then
be generated. After that, the bit counter becomes “0002” and an SCL
for 1 byte is output. The START condition generation timing and BB
bit set timing are different in the standard clock mode and the high-
speed clock mode. Refer to Figure 8.6.9 for the START condition
generation timing diagram, and Table 8.6.2 for the START condition/
STOP condition generation timing table.
Fig. 8.6.9 START Condition Generation Timing Diagram
I
2
C
s
t
a
t
u
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g
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s
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w
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S
e
t
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m
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S
C
L
S
D
A
B
B
f
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B
B
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8.6.7 STOP Condition Generation Method
When the ESO bit of the I
2
C control register (address 00F916) is “1,”
execute a write instruction to the I
2
C status register (address 00F816)
for setting the MST bit and the TRX bit to “1” and the BB bit to “0”. A
STOP condition will then be generated. The STOP condition genera-
tion timing and the BB flag reset timing are different in the standard
clock mode and the high-speed clock mode. Refer to Figure 8.6.10
for the STOP condition generation timing diagram, and Table 8.6.2
for the START condition/STOP condition generation timing table.
Fig. 8.6.10 STOP Condition Generation Timing Diagram
Table 8.6.2 START Condition/STOP Condition Generation Tim-
ing Table
Item
Setup time
(START condition)
Setup time
(STOP condition)
Hold time
Set/reset time
for BB flag
Standard Clock Mode
5.0 µs (20 cycles)
4.25 µs (17 cycles)
5.0 µs (20 cycles)
3.0 µs (12 cycles)
High-speed Clock Mode
2.5 µs (10 cycles)
1.75 µs (7 cycles)
2.5 µs (10 cycles)
1.5 µs (6 cycles)
Note: Absolute time at φ = 4 MHz. The value in parentheses denotes the
number of φ cycles.
I
2
C
s
t
a
t
u
s
r
e
g
i
s
t
e
r
w
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t
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H
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S
e
t
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t
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m
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S
C
L
S
D
A
B
B
f
l
a
g
R
e
se
t
t
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m
e
f
o
r
B
B
f
l
a
g
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