Renesas PROM Programming Adapter PCA7435FPG02 Manuale Utente Scaricare il pdf (Pagina 4)

7540 Group

Rev.4.00 Jun 21, 2004 page 4 of 82

REJ03B0011-0400Z

FUNCTIONAL BLOCK

Fig. 5 Functional block diagram (32P6U package)

FUNCTIONAL BLOCK DIAGRAM (Package: 32P6U)

X

IN

OU

T

X

SI/O1(8)

RAM

ROM

CPU

A

X

Y

S

PC

H

PC

L

PS

V

SS

11

RESET

6

V

CC

8

7

CNV

SS

P1(5)

30 28

26

29

27

32

31

P2(6)

P3(6)

1215 13

5

Reset input

I/O port P2

I/O port P1I/O port P3

Clock generating circuit

Clock input

Clock output

9

10

4

2

3

1

A/D

converter

(10)

V

REF

Watchdog timer

Reset

0

14

INT

0

1617

SI/O2(8)

CNTR

0

I/O port P0

Prescaler Y (8)

Prescaler Z (8)

Timer X (8)

Timer Z (8)

Timer Y (8)

Key-on wakeup

TY

OUT

TZ

OUT

Prescaler X (8)

CNTR

1

Timer A (16)

P0(8)

25

23 21

19

24

22

20 18

INT

0

Timer 1 (8)

Prescaler 1 (8)

TX

OUT

1 2 3 4 5 6 7 8 9 ... 87 88

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