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V850E2/MN4 CSIH Control

R01AN0924EJ0100 Rev.1.00 Page 31 of 40

Feb 10, 2012

/* Clear status flags to 0 */

CSIHnTMOEC = 1; /* Clear timeout error flag */

CSIHnOFEC = 1; /* Clear overflow error flag */

CSIHnPEC = 1; /* Clear parity error flag */

CSIHnOVEC = 1; /* Clear overrun error flag */

CSIHnPCT = 1; /* Clear FIFO buffer pointer */

CSIHnDCEC = 1; /* Clear data consistency error flag */

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Renesas MN4 Specifiche Pagina 31