Renesas M32R-FPU Manuale Utente Pagina 17

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M32R Debugger and Trace 17 General SYStem Settings and Restrictions
©1989-2014 Lauterbach GmbH
SYStem.Option DBI Enables program break via debug interrupt
Default: OFF.
When DBI is ON, the chip will stop faster rather than via SW control, provided the CPU offers DBI capability.
SYStem.Option IMASKASM Disable interrupts while single stepping
Default: OFF.
If enabled, the interrupt mask bits of the CPU will be set during assembler single-step operations. The
interrupt routine is not executed during single-step operations. After single step the interrupt mask bits are
restored to the value before the step.
SYStem.Option IMASKHLL Disable interrupts while HLL single stepping
Default: OFF.
If enabled, the interrupt mask bits of the CPU will be set during HLL single-step operations. The interrupt
routine is not executed during single-step operations. After single step the interrupt mask bits are restored to
the value before the step.
Format: SYStem.Option DBI [ON | OFF]
Format: SYStem.Option IMASKASM [ON | OFF]
Format: SYStem.Option IMASKHLL [ON | OFF]
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