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2-12

M32R-FPU Software Manual (Rev.1.01)

2.2 Instruction format

There are two major instruction formats: two 16-bit instructions packed together within a

word boundary, and a single 32-bit instruction (see Figure 2.2.1). Figure 2.2.2 shows

the instruction format of M32R CPU.

Fig. 2.2.2 Instruction format of M32R CPU

Fig. 2.2.1 16-bit instruction and 32-bit instruction

< 16-bit instruction >

op1 R

op2

op1 R

op1 cond c

op1 R

op2 c

op1 R

op2 c

op1 R

op1 cond c

< 32-bit instruction >

= R

op R

= R

op c

Branch (Short Displacement)

= R

op c

Branch

Compare and Branch

= R

op c

op1 R

0000

op2

op3 R

0000

op4

op1 R

op2

Floating-point 2-operand

d=op(Rs))

Floating-point 3-operand

d=Rs1 op Rs2)

op3 R

0000

op4

16-bit instruction A

+ 0 + 1 + 2 + 3

1 word

32-bit instruction

address

1 word

+ 0 + 1 + 2 + 3address

16-bit instruction B

INSTRUCTION SET

2.2 Instruction format

1 2 ... 31 32 33 34 35 36 37 38 39 40 41 ... 193 194

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