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PD70F3003A, 70F3025A, 70F3003A(A)
9
Data Sheet U13189EJ5V1DS
2.2 Non-Port Pins
(1/2)
Pin Name I/O Function Alternate Function
TO110 Output Pulse signal output from timers 11 to 14 P00
TO111 P01
TO120 P10
TO121 P11
TO130 P30
TO131 P31
TO140 P110
TO141 P111
TCLR11 Input External clear signal input for timers 11 to 14 P02
TCLR12 P12
TCLR13 P32
TCLR14 P112
TI11 Input External count clock input for timers 11 to 14 P03
TI12 P13
TI13 P33
TI14 P113
INTP110 Input External maskable interrupt request input and external capture P04
INTP111
trigger input for timer 11
P05
INTP112 P06
INTP113 P07/ADTRG
INTP120 Input External maskable interrupt request input and external capture P14
INTP121
trigger input for timer 12
P15/SO2
INTP122 P16/S12
INTP123 P17/SCK2
INTP130 Input External maskable interrupt request input and external capture P34
INTP131
trigger input for timer 13
P35/SO3
INTP132 P36/SI3
INTP133 P37/SCK3
INTP140 Input External maskable interrupt request input and external capture P114
INTP141
trigger input for timer 14
P115
INTP142 P116
INTP143 P117
SO0 Output Serial transmit data output for CSI0 to CSI3 (3-wire) P22/TXD0
SO1 P25/TXD1
SO2 P15/INTP121
SO3 P35/INTP131
SI0 Input Serial receive data output for CSI0 to CSI3 (3-wire) P23/RXD0
SI1 P26/RXD1
SI2 P16/INTP122
SI3 P36/INTP132
- To our customers 1
- MOS INTEGRATED CIRCUIT 3
- APPLICATIONS 4
- PIN CONFIGURATION (Top View) 4
- INTERNAL BLOCK DIAGRAM 6
- 2. PIN FUNCTIONS 9
- 2.1 Port Pins 9
- Data Sheet U13189EJ5V1DS 10
- 2.2 Non-Port Pins 11
- DD or VSS via a resistor 13
- 3. ELECTRICAL SPECIFICATIONS 16
- 3.1 Normal Operation Mode 16
- °C, VDD = VSS = 0 V) 17
- High-speed CMOS inverter 18
- External clock 18
- A = 25°C and VDD = 5.0 V 19
- °C, VDD = VDDDR) 21
- Test points 23
- (2) Input wave 25
- (b) Other than (a) 25
- OR 10 ns 26
- OF 10 ns 26
- WRSH 500 ns 26
- (6) Write timing (1/2) 29
- Remarks 1. T = tCYK 29
- (7) Bus hold timing (1/2) 31
- (7) Bus hold timing (2/2) 32
- (8) Interrupt timing 33
- Remark T = tCYK 33
- (9) CSI timing (2/2) 35
- (ii) CSI3 timing 35
- (10) RPU timing 36
- ±10%, VSS = AVSS = 0 V)) 39
- 4. PACKAGE DRAWING 42
- Recommended 44
- NOTES FOR CMOS DEVICES 46
- Regional Information 48
- M8E 02. 11-1 49
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AEG HG694340NB manuály
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